A flip-flop (hereinafter abbreviated as FF) is a kind of sequential logic circuit, which is a storage circuit that stores 1-bit data as “0” or “1.” A master-slave FF is known as an FF in which two latch circuits each including an inverter loop are connected to each other in series.
FIG. 11A illustrates a conventional master-slave FF. FIG. 11B is an equivalent circuit diagram of FIG. 11A. As illustrated in FIGS. 11A and 11B, a flip-flop circuit (FF) 1 includes two latch circuits (LAT-1 and LAT-2) connected to each other in series. LAT-1 includes an inverter (INV) 2 and clocked inverters (CINV) 3 and 4. LAT-2 includes INV 5, CINV 6, and CINV 7. The phases of clock signals CLK and CLKB are inverted from each other. VDD is high power supply voltage, and VSS is low power supply voltage.
In FF 1, when the clock signal CLK is high (H), input data D is retrieved from an input terminal and LAT-1 outputs the data to LAT-2. When the clock signal CLK is low (L), LAT-1 separates the input terminal from an internal circuit and retains the retrieved data. LAT-2 retrieves the data retained in LAT-1 and outputs the data as data Q from an output terminal.
A transistor whose channel formation region includes an oxide semiconductor (OS) such as an In—Ga—Zn oxide (In—Ga—Zn—O) (hereinafter such a transistor is referred to as an OS transistor) is known. It is known that an OS transistor has extremely low off-state current because an oxide semiconductor has a wider bandgap than silicon. For example, Patent Document 1 discloses a flip-flop circuit in which an OS transistor is used as a switch.